The present invention generally relates to monitoring semiconductor fabrication processes, and in particular to a system and method for monitoring wafer stresses by real-time, in-situ scatterometry analysis of grating distortion measurements.
In the semiconductor industry, device densities continue to increase and thus, there have been, and continue to be, efforts toward scaling down device dimensions (e.g., at sub-micron levels) on semiconductor wafers. In order to scale down device dimensions (e.g., width and spacing of interconnecting lines, spacing and diameter of contact holes, surface geometry such as corners and edges) of various features, more precise control of fabrication processes are required. The dimensions of and between features can be referred to as critical dimensions (CDs). Reducing CDs, and reproducing more accurate CDs facilitates achieving higher device densities through scaled down device dimensions. However, stresses on materials (e.g., thin films) employed in semiconductor manufacturing can create problems that make achieving reduced and more accurate CDs more difficult.
The process of manufacturing semiconductors, or integrated circuits (commonly called ICs, or chips), typically includes more than a hundred steps, during which hundreds of copies of an integrated circuit may be formed on a single wafer. At each step, stresses placed on materials like thin films may affect the CDs on the ICs if such stresses lead to distortion of the materials and/or features fabricated into the materials. Generally, the manufacturing process involves creating several patterned layers on and into the substrate that ultimately forms the complete integrated circuit. This layering process creates electrically active regions in and on the semiconductor wafer surface. The layer to layer orientation, location, size, shape and isolation of such electrically active regions, and thus the reliability and performance of integrated circuits employing such regions depend, at least in part, on the precision with which features can be placed on a wafer. Unfortunately, commonly used fabrication processes generate stresses that may cause distortion in features placed on a wafer. Conventional fabrication systems check for distortion (e.g., bow, warp, misalignment, stretching, compressions) near or at the end of fabrication, or at pre-scheduled time intervals. These types of end-point and interval detection methods can be problematic for several reasons. For example, at late stages in the fabrication process, the presence of an unacceptable distortion may render the whole semiconductor device unusable, forcing it to be discarded. In addition, post-fabrication detection/quality control data do not provide a user with real-time information related to the device being fabricated, and thus opportunities to study a fabrication process to determine when, how, and why stresses are being generated are missed. Post-fabrication data may only allow an estimation or a projection as to what adjustments are needed to correct the fabrication process. Such estimations and/or projections concerning necessary adjustments may lead to continued or recurring fabrication errors. Moreover, such a lengthy adjustment process may cause subsequent fabricated wafers to be wasted in the hopes of mitigating errors.
Visual inspection methods have been important in analyzing integrated circuit manufacture. Visually inspecting wafers is well-known in the art. While visual inspection techniques may be simple to implement, they are difficult to automate, and do not provide in-situ opportunities for process monitoring and/or study. Further, visual techniques employing scanning electron microscopes (SEM) and atomic force microscopes (AFM) can be expensive, time-consuming and/or destructive.
Thus, an efficient system, and/or method, to monitor stresses and resulting distortions during IC fabrication is desired to facilitate manufacturing ICs exhibiting desired critical dimensions.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is not intended to identify key or critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a system and method for directly measuring distortions due to stresses during IC fabrication processes in-situ, for storing such measurements for future study and ex-situ adaptations of fabrication processes and for feeding forward control information based on scatterometry analysis of such direct measurements so that fabrication processes can be adapted.
In accordance with one aspect of the present invention, one or more test gratings are formed on a wafer, and thus, during fabrication processes, the test grating can be probed by a scatterometry beam. The light reflected and/or refracted from the test grating can be employed to extract distortion, CD and evolving profile information. The data can be stored to facilitate studying and thus adapting, ex-situ, such fabrication processes. If unacceptable distortion occurs and/or target CDs are not achieved, then the wafer may be marked for reworking and/or discarded. In another aspect of the present invention, the data is employed to produce adaptation control data that can be fed forward, in-situ, to facilitate adapting the fabrication processes.
In accordance with another aspect of the present invention, a system for monitoring and/or controlling semiconductor fabrication processes is provided. The system includes a system for directing light toward gratings located on a wafer, a fabrication monitoring system operable to measure light reflected from the gratings and to produce distortion measurement data and a distortion measurement data store for storing distortion data measurements. The system also includes a processor operatively coupled to the fabrication monitoring system. The processor receives the distortion measurement data from the fabrication monitoring system and records the distortion measurement data in the distortion data store. In one example of the present invention, the fabrication monitoring system further includes a scatterometry system for processing the light reflected from the one or more gratings, at least one fabrication component operable to perform one or more semiconductor fabrication steps on a wafer; and a fabrication component driving system for driving the at least one fabrication component.
Yet another aspect of the present invention provides a method for monitoring a semiconductor fabrication process. The method includes logically partitioning a wafer into portions, fabricating gratings on the wafer, directing an incident light onto the gratings, collecting a reflected light reflected from the gratings, measuring the reflected light to determine distortion measurements associated with the gratings and storing the distortion measurements. In one example of the present invention, the method further includes computing fabrication process adjustments by comparing the distortion measurements to scatterometry signatures associated with stored distortion measurements and adjusting fabrication processes based, at least in part, on the fabrication process adjustments.
To the accomplishment of the foregoing and related ends, certain illustrative aspects of the invention are described herein in connection with the following description and the annexed drawings. These aspects are indicative, however, of but a few of the various ways in which the principles of the invention may be employed and the present invention is intended to include all such aspects and their equivalents. Other advantages and novel features of the invention may become apparent from the following detailed description of the invention when considered in conjunction with the drawings.